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945d83a
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irq/fiq enabled, copy vectors if code resides in ram
author
hackbard
<hackbard@staubsauger.localdomain>
Thu, 20 Sep 2007 21:53:07 +0000
(23:53 +0200)
committer
hackbard
<hackbard@staubsauger.localdomain>
Thu, 20 Sep 2007 21:53:07 +0000
(23:53 +0200)
betty/startup.s
patch
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diff --git
a/betty/startup.s
b/betty/startup.s
index
d393d32
..
18006aa
100644
(file)
--- a/
betty/startup.s
+++ b/
betty/startup.s
@@
-41,6
+41,8
@@
.equ fiq_disable, 0x40
.equ irq_disable, 0x80
.equ fiq_disable, 0x40
.equ irq_disable, 0x80
+.equ vic_vect_addr, 0xfffff030
+
#
# the startup code
#
#
# the startup code
#
@@
-57,6
+59,8
@@
# - that's the vectored address register
# - the vic put in there the address of our service routine
# - that's the vectored address register
# - the vic put in there the address of our service routine
+exception_vectors:
+
ldr pc, handler_reset
ldr pc, handler_undef_instruction
ldr pc, handler_soft_ir
ldr pc, handler_reset
ldr pc, handler_undef_instruction
ldr pc, handler_soft_ir
@@
-64,6
+68,7
@@
ldr pc, handler_data_abort
nop
ldr pc, [pc, #-0xff0]
ldr pc, handler_data_abort
nop
ldr pc, [pc, #-0xff0]
+ #ldr pc, handler_irq
ldr pc, handler_fiq
handler_reset: .word handle_reset
ldr pc, handler_fiq
handler_reset: .word handle_reset
@@
-71,6
+76,7
@@
handler_undef_instruction: .word interrupt_handler_undef_instruction
handler_soft_ir: .word interrupt_handler_soft_ir
handler_prefetch_abort: .word interrupt_handler_prefetch_abort
handler_data_abort: .word interrupt_handler_data_abort
handler_soft_ir: .word interrupt_handler_soft_ir
handler_prefetch_abort: .word interrupt_handler_prefetch_abort
handler_data_abort: .word interrupt_handler_data_abort
+handler_irq: .word vic_vect_addr
handler_fiq: .word interrupt_handler_fiq
# reset handling goes here
handler_fiq: .word interrupt_handler_fiq
# reset handling goes here
@@
-108,6
+114,9
@@
handle_reset:
ldr r0, =stack_limit
mov sl, r0
ldr r0, =stack_limit
mov sl, r0
+ # enable irq and fiq
+ msr cpsr_c, #mode_system
+
# copy data section (only if we are in flash <=> _etext != _data)
ldr r1, =_etext
# copy data section (only if we are in flash <=> _etext != _data)
ldr r1, =_etext
@@
-115,7
+124,7
@@
handle_reset:
ldr r3, =_edata
cmp r1, r2
ldr r3, =_edata
cmp r1, r2
- beq
start_of_c_code
+ beq
copy_exception_vectors
copy_data_loop:
copy_data_loop:
@@
-123,6
+132,18
@@
copy_data_loop:
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo copy_data_loop
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo copy_data_loop
+ b start_of_c_code
+
+ # copy exception vectors (only if we are in ram <=> _etext = _data)
+
+copy_exception_vectors:
+
+ mov r0, #sram_addr
+ ldr r1, =exception_vectors
+ ldmia r1!, {r2-r9}
+ stmia r0!, {r2-r9}
+ ldmia r1!, {r2-r8}
+ stmia r0!, {r2-r8}
# jump to c code
# jump to c code