--- /dev/null
+;***************************************************************************\r
+;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y\r
+;* \r
+;* Number :AVR000\r
+;* File Name :"tn28def.inc"\r
+;* Title :Register/Bit Definitions for the ATtiny28\r
+;* Date :99.01.28\r
+;* Version :1.30\r
+;* Support telephone :+47 72 88 43 88 (ATMEL Norway)\r
+;* Support fax :+47 72 88 43 99 (ATMEL Norway)\r
+;* Support E-mail :avr@atmel.com\r
+;* Target MCU :ATtiny28\r
+;*\r
+;* DESCRIPTION\r
+;* When including this file in the assembly program file, all I/O register\r
+;* names and I/O register bit names appearing in the data book can be used.\r
+;* In addition, the two registers forming the data pointers Z have been \r
+;* assigned names ZL - ZH. \r
+;*\r
+;*\r
+;* The Register names are represented by their hexadecimal address.\r
+;* \r
+;* The Register Bit names are represented by their bit number (0-7).\r
+;* \r
+;* Please observe the difference in using the bit names with instructions\r
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" \r
+;* (skip if bit in register set/cleared). The following example illustrates\r
+;* this:\r
+;* \r
+;* in r16,PORTB ;read PORTB latch\r
+;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)\r
+;* out PORTB,r16 ;output to PORTB\r
+;*\r
+;* in r16,TIFR ;read the Timer Interrupt Flag Register\r
+;* sbrc r16,TOV0 ;test the overflow flag (use bit#)\r
+;* rjmp TOV0_is_set ;jump if set\r
+;* ... ;otherwise do something else\r
+;***************************************************************************\r
+\r
+;***** Specify Device\r
+.device ATtiny28\r
+\r
+;***** I/O Register Definitions\r
+.equ SREG =$3f\r
+.equ PORTA =$1b\r
+.equ PACR =$1a\r
+.equ PINA =$19\r
+.equ PINB =$16\r
+.equ PORTD =$12\r
+.equ DDRD =$11\r
+.equ PIND =$10\r
+.equ ACSR =$08\r
+.equ MCUCS =$07\r
+.equ ICR =$06\r
+.equ IFR =$05\r
+.equ TCCR0 =$04\r
+.equ TCNT0 =$03\r
+.equ MODCR =$02\r
+.equ WDTCR =$01\r
+.equ OSCCAL =$00\r
+\r
+\r
+;***** Bit Definitions\r
+.equ PA3 =3\r
+.equ PA2 =2\r
+.equ PA1 =1\r
+.equ PA0 =0\r
+\r
+.equ DDA3 =3\r
+.equ PA2HC =2\r
+.equ DDA1 =1\r
+.equ DDA0 =0\r
+\r
+.equ PINA3 =3\r
+.equ PINA1 =1\r
+.equ PINA0 =0\r
+\r
+.equ PINB7 =7\r
+.equ PINB6 =6\r
+.equ PINB5 =5\r
+.equ PINB4 =4\r
+.equ PINB3 =3\r
+.equ PINB2 =2\r
+.equ PINB1 =1\r
+.equ PINB0 =0\r
+\r
+.equ PD7 =7\r
+.equ PD6 =6\r
+.equ PD5 =5\r
+.equ PD4 =4\r
+.equ PD3 =3\r
+.equ PD2 =2\r
+.equ PD1 =1\r
+.equ PD0 =0\r
+\r
+.equ DDD7 =7\r
+.equ DDD6 =6\r
+.equ DDD5 =5\r
+.equ DDD4 =4\r
+.equ DDD3 =3\r
+.equ DDD2 =2\r
+.equ DDD1 =1\r
+.equ DDD0 =0\r
+\r
+.equ PIND7 =7\r
+.equ PIND6 =6\r
+.equ PIND5 =5\r
+.equ PIND4 =4\r
+.equ PIND3 =3\r
+.equ PIND2 =2\r
+.equ PIND1 =1\r
+.equ PIND0 =0\r
+\r
+.equ ACD =7\r
+.equ ACO =5\r
+.equ ACI =4\r
+.equ ACIE =3\r
+.equ ACIS1 =1\r
+.equ ACIS0 =0\r
+\r
+.equ PLUPB =7\r
+.equ SE =5\r
+.equ SM =4\r
+.equ WDRF =3\r
+.equ EXTRF =1\r
+.equ PORF =0\r
+\r
+.equ INT1 =7\r
+.equ INT0 =6\r
+.equ LLIE =5\r
+.equ TOIE0 =4\r
+.equ ISC11 =3\r
+.equ ISC10 =2\r
+.equ ISC01 =1\r
+.equ ISC00 =0\r
+\r
+.equ INTF1 =7\r
+.equ INTF0 =6\r
+.equ TOV0 =4\r
+\r
+.equ FOV0 =7\r
+.equ OOM01 =4\r
+.equ OOM00 =3\r
+.equ CS02 =2\r
+.equ CS01 =1\r
+.equ CS00 =0\r
+\r
+.equ WDTOE =4\r
+.equ WDE =3\r
+.equ WDP2 =2\r
+.equ WDP1 =1\r
+.equ WDP0 =0\r
+\r
+.equ ONTIM4 =7\r
+.equ ONTIM3 =6\r
+.equ ONTIM2 =5\r
+.equ ONTIM1 =4\r
+.equ ONTIM0 =3\r
+.equ MCONF2 =2\r
+.equ MCONF1 =1\r
+.equ MCONF0 =0\r
+\r
+.equ CAL7 =7\r
+.equ CAL6 =6\r
+.equ CAL5 =5\r
+.equ CAL4 =4\r
+.equ CAL3 =3\r
+.equ CAL2 =2\r
+.equ CAL1 =1\r
+.equ CAL0 =0\r
+\r
+.def ZL =r30\r
+.def ZH =r31\r
+\r
+\r
+.equ FLASHEND = 0x07FF\r
+.equ RAMEND = 0x03FF\r
+\r
+.equ INT0addr =$001 ;External Interrupt0 Vector Address\r
+.equ INT1addr =$002 ;External Interrupt1 Vector Address\r
+.equ LLINTaddr=$003 ;Low level Interrupt Vector Address\r
+.equ OVF0addr =$004 ;Overflow0 Interrupt Vector Address\r
+.equ ACIaddr =$005 ;Analog Comparator Interrupt Vector Address\r
+\r
projects / my-code / atmel.git / blobdiff