--- /dev/null
+; Last change: TF 8 Sep 99 8:18 pm\r
+;***************************************************************************\r
+;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y\r
+;*\r
+;* Number : AVR000\r
+;* File Name : "T15def.inc"\r
+;* Title : Register/Bit Definitions for the ATtiny15\r
+;* Date : 1999.09.08\r
+;* Version : 1.00\r
+;* Support telephone : +47 72 88 43 88 (ATMEL Norway)\r
+;* Support fax : +47 72 88 43 99 (ATMEL Norway)\r
+;* Support E-Mail : avr@atmel.com\r
+;* Target MCU : ATtiny15\r
+;*\r
+;* DESCRIPTION\r
+;* When including this file in the assembly program file, all I/O register\r
+;* names and I/O register bit names appearing in the data book can be used.\r
+;*\r
+;* The Register names are represented by their hexadecimal addresses.\r
+;*\r
+;* The Register Bit names are represented by their bit number (0-7).\r
+;*\r
+;* Please observe the difference in using the bit names with instructions\r
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"\r
+;* (skip if bit in register set/cleared). The following example illustrates\r
+;* this:\r
+;*\r
+;* in r16,PORTB ;read PORTB latch\r
+;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)\r
+;* out PORTB,r16 ;output to PORTB\r
+;*\r
+;* in r16,TIFR ;read the Timer Interrupt Flag Register\r
+;* sbrc r16,TOV0 ;test the overflow flag (use bit#)\r
+;* rjmp TOV0_is_set ;jump if set\r
+;* ... ;otherwise do something else\r
+;***************************************************************************\r
+\r
+;***** Specify Device\r
+.device ATtiny15\r
+\r
+;***** I/O Register Definitions\r
+.equ SREG =$3F\r
+.equ SPL =$3D ; ICE only !!!!!!\r
+.equ GIMSK =$3B\r
+.equ GIFR =$3A\r
+.equ TIMSK =$39\r
+.equ TIFR =$38\r
+.equ MCUCR =$35\r
+.equ MCUSR =$34\r
+.equ TCCR0 =$33\r
+.equ TCNT0 =$32\r
+.equ OSCCAL =$31\r
+.equ TCCR1 =$30\r
+.equ TCNT1 =$2F\r
+.equ OCR1A =$2E\r
+.equ OCR1B =$2D\r
+.equ SFIOR =$2C\r
+.equ WDTCR =$21\r
+.equ EEAR =$1E\r
+.equ EEDR =$1D\r
+.equ EECR =$1C\r
+.equ PORTB =$18\r
+.equ DDRB =$17\r
+.equ PINB =$16\r
+.equ ACSR =$08\r
+.equ ADMUX =$07\r
+.equ ADCSR =$06\r
+.equ ADCH =$05\r
+.equ ADCL =$04\r
+\r
+\r
+;***** Bit Definitions\r
+\r
+; GIMSK\r
+.equ INT0 =6\r
+.equ PCIE =5\r
+\r
+; GIFR\r
+.equ INTF0 =6\r
+.equ PCIF =5\r
+\r
+; TIMSK\r
+.equ OCIE1 =6\r
+.equ TOIE1 =2\r
+.equ TOIE0 =1\r
+\r
+; TIFR\r
+.equ OCF1 =6\r
+.equ TOV1 =2\r
+.equ TOV0 =1\r
+\r
+; MCUCR\r
+\r
+.equ PUD =6\r
+.equ SE =5\r
+.equ SM =4\r
+.equ SM1 =4\r
+.equ SM0 =3\r
+.equ ISC01 =1\r
+.equ ISC00 =0\r
+\r
+; MCUSR\r
+.equ WDRF =3\r
+.equ BORF =2\r
+.equ EXTRF =1\r
+.equ PORF =0\r
+\r
+; TCCR0\r
+.equ CS02 =2\r
+.equ CS01 =1\r
+.equ CS00 =0\r
+\r
+; TCCR1\r
+.equ CTC1 =7\r
+.equ PWM1 =6\r
+.equ COM1A1 =5\r
+.equ COM1A0 =4\r
+.equ CS13 =3\r
+.equ CS12 =2\r
+.equ CS11 =1\r
+.equ CS10 =0\r
+\r
+; WDTCR\r
+.equ WDTOE =4\r
+.equ WDE =3\r
+.equ WDP2 =2\r
+.equ WDP1 =1\r
+.equ WDP0 =0\r
+\r
+; EECR\r
+.equ EERIE =3\r
+.equ EEMWE =2\r
+.equ EEWE =1\r
+.equ EERE =0\r
+\r
+; PORTB\r
+.equ PB4 =4\r
+.equ PB3 =3\r
+.equ PB2 =2\r
+.equ PB1 =1\r
+.equ PB0 =0\r
+\r
+; DDRB\r
+.equ DDB5 =5\r
+.equ DDB4 =4\r
+.equ DDB3 =3\r
+.equ DDB2 =2\r
+.equ DDB1 =1\r
+.equ DDB0 =0\r
+\r
+; PINB\r
+.equ PINB5 =5\r
+.equ PINB4 =4\r
+.equ PINB3 =3\r
+.equ PINB2 =2\r
+.equ PINB1 =1\r
+.equ PINB0 =0\r
+\r
+; ACSR\r
+.equ ACD =7\r
+.equ AINBG6 =6\r
+.equ ACO =5\r
+.equ ACI =4\r
+.equ ACIE =3\r
+.equ ACIS1 =1\r
+.equ ACIS0 =0\r
+\r
+; ADMUX\r
+.equ REFS1 =7\r
+.equ REFS0 =6\r
+.equ ADLAR =5\r
+.equ MUX2 =2\r
+.equ MUX1 =1\r
+.equ MUX0 =0\r
+\r
+;ADCSR\r
+.equ ADEN =7\r
+.equ ADSC =6\r
+.equ ADFR =5\r
+.equ ADIF =4\r
+.equ ADIE =3\r
+.equ ADPS2 =2\r
+.equ ADPS1 =1\r
+.equ ADPS0 =0\r
+\r
+;SFIOR\r
+.equ FOC1A =2\r
+.equ PSR1 =1\r
+.equ PSR0 =0\r
+\r
+.equ RAMEND =0 ; Last On-Chip SRAM Location\r
+.equ XRAMEND =0 ; Last External RAM Location\r
+.equ E2END =3F ; Last EEPROM Location\r
+.equ FLASHEND=1FF ; Last FLASH Location\r
+\r
+.equ INT0addr=$001 ; External Interrupt0 Vector Address\r
+.equ PCaddr =$002 ; Pin Change Interrupt Vector Address\r
+.equ T1CPaddr=$003 ; Timer1 Compare Interrupt Vector Address\r
+.equ T1OVaddr=$004 ; Timer1 Overflow Interrupt Vector Address\r
+.equ T0OVaddr=$005 ; Timer0 Overflow Interrupt Vector Address\r
+.equ ERDYaddr=$006 ; EEPROM Ready Interrupt Vector Address\r
+.equ ACaddr =$007 ; Analog Comparator Interrupt Vector Address\r
+.equ ADCaddr =$008 ; AD Converter Interrupt Vector Address\r
+\r
+.def ZL =r30\r
+.def ZH =r31\r
+\r
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