--- /dev/null
+\r
+;***************************************************************************\r
+;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y\r
+;* \r
+;* Number :AVR000\r
+;* File Name :"tn12.inc"\r
+;* Title :Register/Bit Definitions for the ATtiny12\r
+;* Date :99.01.28\r
+;* Version :1.30\r
+;* Support telephone :+47 72 88 43 88 (ATMEL Norway)\r
+;* Support fax :+47 72 88 43 99 (ATMEL Norway)\r
+;* Support E-mail :avr@atmel.com\r
+;* Target MCU :ATtiny12\r
+;*\r
+;* DESCRIPTION\r
+;* When including this file in the assembly program file, all I/O register \r
+;* names and I/O register bit names appearing in the data book can be used.\r
+;* In addition, the two registers forming the data pointer Z have been \r
+;* assigned names ZL - ZH. \r
+;*\r
+;* The Register names are represented by their hexadecimal address.\r
+;* \r
+;* The Register Bit names are represented by their bit number (0-7).\r
+;* \r
+;* Please observe the difference in using the bit names with instructions\r
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" \r
+;* (skip if bit in register set/cleared). The following example illustrates\r
+;* this:\r
+;* \r
+;* in r16,PORTB ;read PORTB latch\r
+;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)\r
+;* out PORTB,r16 ;output to PORTB\r
+;*\r
+;* in r16,TIFR ;read the Timer Interrupt Flag Register\r
+;* sbrc r16,TOV0 ;test the overflow flag (use bit#)\r
+;* rjmp TOV0_is_set ;jump if set\r
+;* ... ;otherwise do something else\r
+;***************************************************************************\r
+\r
+;***** Specify Device\r
+.device ATtiny12\r
+\r
+;***** I/O Register Definitions\r
+.equ SREG =$3f\r
+.equ GIMSK =$3b\r
+.equ GIFR =$3a\r
+.equ TIMSK =$39\r
+.equ TIFR =$38\r
+.equ MCUCR =$35\r
+.equ MCUSR =$34\r
+.equ TCCR0 =$33\r
+.equ TCNT0 =$32\r
+.equ OSCCAL =$31\r
+.equ WDTCR =$21\r
+.equ EEAR =$1e\r
+.equ EEDR =$1d\r
+.equ EECR =$1c\r
+.equ PORTB =$18\r
+.equ DDRB =$17\r
+.equ PINB =$16\r
+.equ ACSR =$08\r
+\r
+;***** Bit Definitions\r
+.equ INT0 =6\r
+.equ PCIE =5\r
+\r
+.equ INTF0 =6\r
+.equ PCIF =5\r
+\r
+.equ TOIE0 =1\r
+\r
+.equ TOV0 =1\r
+\r
+.equ CS02 =2\r
+.equ CS01 =1\r
+.equ CS00 =0\r
+\r
+.equ PUD =6\r
+.equ SE =5\r
+.equ SM =4\r
+.equ ISC01 =1\r
+.equ ISC00 =0\r
+\r
+.equ WDDE =4\r
+.equ WDE =3\r
+.equ WDP2 =2\r
+.equ WDP1 =1\r
+.equ WDP0 =0\r
+\r
+.equ CAL7 =7\r
+.equ CAL6 =6\r
+.equ CAL5 =5\r
+.equ CAL4 =4\r
+.equ CAL3 =3\r
+.equ CAL2 =2\r
+.equ CAL1 =1\r
+.equ CAL0 =0\r
+\r
+.equ EERIE =3\r
+.equ EEMWE =2\r
+.equ EEWE =1\r
+.equ EERE =0\r
+\r
+.equ PB4 =4\r
+.equ PB3 =3\r
+.equ PB2 =2\r
+.equ PB1 =1\r
+.equ PB0 =0\r
+\r
+.equ DDB5 =5\r
+.equ DDB4 =4\r
+.equ DDB3 =3\r
+.equ DDB2 =2\r
+.equ DDB1 =1\r
+.equ DDB0 =0\r
+\r
+.equ PINB5 =5\r
+.equ PINB4 =4\r
+.equ PINB3 =3\r
+.equ PINB2 =2\r
+.equ PINB1 =1\r
+.equ PINB0 =0\r
+\r
+.equ ACD =7\r
+.equ AINBG =6\r
+.equ ACO =5\r
+.equ ACI =4\r
+.equ ACIE =3\r
+.equ ACIS1 =1\r
+.equ ACIS0 =0\r
+\r
+.equ WDRF =3\r
+.equ BORF =2\r
+.equ EXTRF =1\r
+.equ PORF =0\r
+\r
+.def ZL =r30\r
+.def ZH =r31\r
+\r
+.equ FLASHEND=$1FF\r
+.equ E2END =$3F\r
+\r
+.equ INT0addr=$001 ;External Interrupt0 Vector Address\r
+.equ PCINTaddr=$002 ;Pin change Interrupt Vector Address\r
+.equ OVF0addr=$003 ;Overflow0 Interrupt Vector Address\r
+.equ ERDYaddr =$004 ;EEPROM Interrupt Vector Address\r
+.equ ACIaddr =$005 ;Analog Comparator Interrupt Vector Address\r
+\r
projects / my-code / atmel.git / blobdiff