--- /dev/null
+;***************************************************************************\r
+;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y\r
+;* \r
+;* Number : AVR000\r
+;* File Name : "m169def.inc"\r
+;* Title : Register/Bit Definitions for the ATmega169\r
+;* Date : June 14th, 2001\r
+;* Version : 2.0\r
+;* Support telephone : +47 72 88 43 88 (ATMEL Norway)\r
+;* Support fax : +47 72 88 43 99 (ATMEL Norway)\r
+;* Support E-mail : support@atmel.no\r
+;* Target MCU : ATmega169\r
+;*\r
+;* DESCRIPTION\r
+;* When including this file in the assembly program file, all I/O register \r
+;* names and I/O register bit names appearing in the data book can be used.\r
+;* In addition, the six registers forming the three data pointers X, Y and\r
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal \r
+;* SRAM is also defined \r
+;*\r
+;* The Register names are represented by their hexadecimal address.\r
+;* \r
+;* The Register Bit names are represented by their bit number (0-7).\r
+;* \r
+;* Please observe the difference in using the bit names with instructions\r
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" \r
+;* (skip if bit in register set/cleared). The following example illustrates\r
+;* this:\r
+;* \r
+;* in r16,PORTB ;read PORTB latch\r
+;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)\r
+;* out PORTB,r16 ;output to PORTB\r
+;*\r
+;* in r16,TIFR ;read the Timer Interrupt Flag Register\r
+;* sbrc r16,TOV0 ;test the overflow flag (use bit#)\r
+;* rjmp TOV0_is_set ;jump if set\r
+;* ... ;otherwise do something else\r
+;***************************************************************************\r
+\r
+;**** Specify Device ****\r
+.device ATmega169\r
+\r
+;*****************************************************************************\r
+; I/O Register Definitions\r
+;*****************************************************************************\r
+\r
+;**** Memory Mapped I/O Register Definitions ****\r
+.equ LCDDR18 = $FE\r
+.equ LCDDR17 = $FD \r
+.equ LCDDR16 = $FC\r
+.equ LCDDR15 = $FB\r
+.equ LCDDR13 = $F9 \r
+.equ LCDDR12 = $F8\r
+.equ LCDDR11 = $F7\r
+.equ LCDDR10 = $F6 \r
+.equ LCDDR8 = $F4\r
+.equ LCDDR7 = $F3\r
+.equ LCDDR6 = $F2\r
+.equ LCDDR5 = $F1 \r
+.equ LCDDR3 = $EF\r
+.equ LCDDR2 = $EE\r
+.equ LCDDR1 = $ED \r
+.equ LCDDR0 = $EC\r
+.equ LCDCCR = $E7\r
+.equ LCDFRR = $E6\r
+.equ LCDCRB = $E5\r
+.equ LCDCRA = $E4\r
+.equ UDR0 = $C6 \r
+.equ UBRR0H = $C5 \r
+.equ UBRR0L = $C4 \r
+.equ UCSR0C = $C2\r
+.equ UCSR0B = $C1\r
+.equ UCSR0A = $C0\r
+.equ USIDR = $BA\r
+.equ USISR = $B9\r
+.equ USICR = $B8\r
+.equ ASSR = $B6\r
+.equ OCR2A = $B3 \r
+.equ TCNT2 = $B2 \r
+.equ TCCR2A = $B0\r
+.equ OCR1BH = $8B \r
+.equ OCR1BL = $8A \r
+.equ OCR1AH = $89 \r
+.equ OCR1AL = $88 \r
+.equ ICR1H = $87 \r
+.equ ICR1L = $86 \r
+.equ TCNT1H = $85 \r
+.equ TCNT1L = $84 \r
+.equ TCCR1C = $82 \r
+.equ TCCR1B = $81\r
+.equ TCCR1A = $80\r
+.equ DIDR1 = $7F\r
+.equ DIDR0 = $7E\r
+.equ ADMUX = $7C \r
+.equ ADCSRB = $7B\r
+.equ ADCSRA = $7A\r
+.equ ADCH = $79 \r
+.equ ADCL = $78\r
+.equ TIMSK2 = $70\r
+.equ TIMSK1 = $6F\r
+.equ TIMSK0 = $6E\r
+.equ PCMSK1 = $6C\r
+.equ PCMSK0 = $6B \r
+.equ EICRA = $69 \r
+.equ OSCCAL = $66\r
+.equ CLKPR = $61\r
+.equ WDTCR = $60\r
+.equ SREG = $3F\r
+.equ SPH = $3E\r
+.equ SPL = $3D\r
+.equ SPMCSR = $37\r
+.equ MCUCR = $35\r
+.equ MCUSR = $34\r
+.equ SMCR = $33\r
+.equ OCDR = $31\r
+.equ ACSR = $30\r
+.equ SPDR = $2E \r
+.equ SPSR = $2D\r
+.equ SPCR = $2C\r
+.equ GPIOR2 = $2B \r
+.equ GPIOR1 = $2A \r
+.equ OCR0A = $27\r
+.equ TCNT0 = $26 \r
+.equ TCCR0A = $24\r
+.equ GTCCR = $23\r
+.equ EEARH = $22 \r
+.equ EEARL = $21 \r
+.equ EEDR = $20\r
+.equ EECR = $1F\r
+.equ GPIOR0 = $1E \r
+.equ EIMSK = $1D\r
+.equ EIFR = $1C\r
+.equ TIFR2 = $17\r
+.equ TIFR1 = $16\r
+.equ TIFR0 = $15\r
+.equ PORTG = $14\r
+.equ DDRG = $13\r
+.equ PING = $12\r
+.equ PORTF = $11\r
+.equ DDRF = $10\r
+.equ PINF = $0F\r
+.equ PORTE = $0E\r
+.equ DDRE = $0D\r
+.equ PINE = $0C\r
+.equ PORTD = $0B\r
+.equ DDRD = $0A\r
+.equ PIND = $09\r
+.equ PORTC = $08\r
+.equ DDRC = $07\r
+.equ PINC = $06\r
+.equ PORTB = $05\r
+.equ DDRB = $04\r
+.equ PINB = $03\r
+.equ PORTA = $02\r
+.equ DDRA = $01\r
+.equ PINA = $00\r
+\r
+;*****************************************************************************\r
+; Bit Definitions\r
+;*****************************************************************************\r
+\r
+; *** LCDDR18, LCDDR13, LCDDR8, LCDDR3 ***\r
+.equ SEG24 = 0 \r
+\r
+; *** LCDSR17, LCDSR12, LCDSR7, LCDSR2 ***\r
+.equ SEG23 = 7 \r
+.equ SEG22 = 6\r
+.equ SEG21 = 5\r
+.equ SEG20 = 4\r
+.equ SEG19 = 3\r
+.equ SEG18 = 2\r
+.equ SEG17 = 1\r
+.equ SEG16 = 0\r
+\r
+; *** LCDSR16, LCDSR11, LCDSR6, LCDSR1 ***\r
+.equ SEG15 = 7 \r
+.equ SEG14 = 6\r
+.equ SEG13 = 5\r
+.equ SEG12 = 4\r
+.equ SEG11 = 3\r
+.equ SEG10 = 2\r
+.equ SEG9 = 1\r
+.equ SEG8 = 0\r
+ \r
+; *** LCDSR15, LCDSR10, LCDSR5, LCDSR0 ***\r
+.equ SEG7 = 7 \r
+.equ SEG6 = 6\r
+.equ SEG5 = 5\r
+.equ SEG4 = 4\r
+.equ SEG3 = 3\r
+.equ SEG2 = 2\r
+.equ SEG1 = 1\r
+.equ SEG0 = 0\r
+\r
+; *** LCDCCR ***\r
+.equ LCDCC3 = 3 \r
+.equ LCDCC2 = 2\r
+.equ LCDCC1 = 1\r
+.equ LCDCC0 = 0\r
+\r
+; *** LCDFRR *** \r
+.equ LCDPS2 = 6 \r
+.equ LCDPS1 = 5\r
+.equ LCDPS0 = 4\r
+.equ LCDCD2 = 2\r
+.equ LCDCD1 = 1\r
+.equ LCDCD0 = 0\r
+ \r
+; *** LCDCRB ***\r
+.equ LCDCS = 7 \r
+.equ LCDB2 = 6\r
+.equ LCDMUX1 = 5 \r
+.equ LCDMUX0 = 4\r
+.equ LCDPM2 = 2\r
+.equ LCDPM1 = 1\r
+.equ LCDPM0 = 0\r
+ \r
+; *** LCDCRA ***\r
+.equ LCDEN = 7 \r
+.equ LCDAB = 6 \r
+.equ LCDIF = 4\r
+.equ LCDIE = 3\r
+.equ LCDBL = 0\r
+\r
+; *** UCSR0C ***\r
+.equ UMSEL0 = 6 \r
+.equ UPM01 = 5\r
+.equ UPM00 = 4\r
+.equ USBS0 = 3\r
+.equ UCSZ01 = 2\r
+.equ UCSZ00 = 1\r
+.equ UCPOL0 = 0\r
+\r
+; *** UCSR0B ***\r
+.equ RXCIE0 = 7 \r
+.equ TXCIE0 = 6\r
+.equ UDRIE0 = 5\r
+.equ RXEN0 = 4\r
+.equ TXEN0 = 3\r
+.equ UCSZ02 = 2\r
+.equ RXB80 = 1\r
+.equ TXB80 = 0\r
+\r
+; *** UCSR0A ***\r
+.equ RXC0 = 7 \r
+.equ TXC0 = 6\r
+.equ UDRE0 = 5\r
+.equ FE0 = 4\r
+.equ DOR0 = 3\r
+.equ PE0 = 2\r
+.equ U2X0 = 1\r
+.equ MPCM0 = 0\r
+\r
+;*** USISR ***\r
+.equ USISIF = 7 \r
+.equ USIOIF = 6\r
+.equ USIPF = 5\r
+.equ USIDC = 4\r
+.equ USICNT3 = 3\r
+.equ USICNT2 = 2\r
+.equ USICNT1 = 1\r
+.equ USICNT0 = 0\r
+\r
+; *** USICR ***\r
+.equ USISIE = 7 \r
+.equ USIOIE = 6\r
+.equ USIWM1 = 5\r
+.equ USIWM0 = 4\r
+.equ USICS1 = 3\r
+.equ USICS0 = 2\r
+.equ USICLK = 1\r
+.equ USITC = 0\r
+ \r
+; *** ASSR ***\r
+.equ EXCLK = 4\r
+.equ AS2 = 3 \r
+.equ TCN2UB = 2\r
+.equ OCR2UB = 1\r
+.equ TCR2UB = 0\r
+\r
+; *** TCCR2A ***\r
+.equ FOC2 = 7 \r
+.equ WGM20 = 6\r
+.equ COM2A1 = 5\r
+.equ COM2A0 = 4\r
+.equ WGM21 = 3\r
+.equ CS22 = 2\r
+.equ CS21 = 1\r
+.equ CS20 = 0\r
+\r
+; *** TCCR1C ***\r
+.equ FOC1A = 7 \r
+.equ FOC1B = 6\r
+\r
+; *** TCCR1B ***\r
+.equ ICNC1 = 7 \r
+.equ ICES1 = 6\r
+.equ WGM13 = 4\r
+.equ WGM12 = 3\r
+.equ CS12 = 2\r
+.equ CS11 = 1\r
+.equ CS10 = 0\r
+\r
+; *** TCCR1A ***\r
+.equ COM1A1 = 7 \r
+.equ COM1A0 = 6\r
+.equ COM1B1 = 5\r
+.equ COM1B0 = 4\r
+.equ COM1C1 = 3\r
+.equ COM1C0 = 2\r
+.equ WGM11 = 1\r
+.equ WGM10 = 0\r
+\r
+; *** DIDR1 ***\r
+.equ ADC7D = 7 \r
+.equ ADC6D = 6\r
+.equ ADC5D = 5\r
+.equ ADC4D = 4\r
+.equ ADC3D = 3\r
+.equ ADC2D = 2\r
+.equ ADC1D = 1\r
+.equ ADC0D = 0\r
+\r
+; *** DIDR0 ***\r
+.equ AIN1D = 1 \r
+.equ AIN0D = 0\r
+\r
+; *** ADMUX ***\r
+.equ REFS1 = 7 \r
+.equ REFS0 = 6\r
+.equ ADLAR = 5\r
+.equ MUX4 = 4\r
+.equ MUX3 = 3\r
+.equ MUX2 = 2\r
+.equ MUX1 = 1\r
+.equ MUX0 = 0\r
+\r
+; *** ADCSRB ***\r
+.equ ADHSM = 7 \r
+.equ ACME = 6\r
+.equ ADTS2 = 2\r
+.equ ADTS1 = 1\r
+.equ ADTS0 = 0\r
+\r
+; *** ADCSRA ***\r
+.equ ADEN = 7 \r
+.equ ADSC = 6\r
+.equ ADRF = 5\r
+.equ ADIF = 4\r
+.equ ADIE = 3\r
+.equ ADPS2 = 2\r
+.equ ADPS1 = 1\r
+.equ ADPS0 = 0\r
+\r
+; *** TIMSK2 ***\r
+.equ OCIE2A = 1\r
+.equ TOIE2 = 0\r
+\r
+; *** TIMSK1 ***\r
+.equ ICIE1 = 5 \r
+.equ OCIE1B = 2\r
+.equ OCIE1A = 1\r
+.equ TOIE1 = 0\r
+\r
+; *** TIMSK0 ***\r
+.equ OCIE0A = 1\r
+.equ TOIE0 = 0\r
+\r
+; *** PCMSK1 ***\r
+.equ PCINT15 = 7 \r
+.equ PCINT14 = 6\r
+.equ PCINT13 = 5\r
+.equ PCINT12 = 4\r
+.equ PCINT11 = 3\r
+.equ PCINT10 = 2\r
+.equ PCINT9 = 1\r
+.equ PCINT8 = 0\r
+\r
+; *** PCMSK0 ***\r
+.equ PCINT7 = 7 \r
+.equ PCINT6 = 6\r
+.equ PCINT5 = 5\r
+.equ PCINT4 = 4\r
+.equ PCINT3 = 3\r
+.equ PCINT2 = 2\r
+.equ PCINT1 = 1\r
+.equ PCINT0 = 0\r
+\r
+; *** EICRA ***\r
+.equ ISC01 = 1\r
+.equ ISC00 = 0\r
+\r
+; *** CLKPR ***\r
+.equ CLKPCE = 7 \r
+.equ CLKPS3 = 3\r
+.equ CLKPS2 = 2\r
+.equ CLKPS1 = 1\r
+.equ CLKPS0 = 0\r
+\r
+; *** WDTCR ***\r
+.equ WDCE = 4 \r
+.equ WDE = 3\r
+.equ WDP2 = 2\r
+.equ WDP1 = 1\r
+.equ WDP0 = 0\r
+\r
+; *** SREG ***\r
+.equ I = 7 \r
+.equ T = 6\r
+.equ H = 5\r
+.equ S = 4\r
+.equ V = 3\r
+.equ N = 2\r
+.equ Z = 1\r
+.equ C = 0\r
+\r
+; *** SPH ***\r
+.equ SP15 = 7 \r
+.equ SP14 = 6\r
+.equ SP13 = 5\r
+.equ SP12 = 4\r
+.equ SP11 = 3\r
+.equ SP10 = 2\r
+.equ SP9 = 1\r
+.equ SP8 = 0\r
+\r
+; *** SPL ***\r
+.equ SP7 = 7 \r
+.equ SP6 = 6\r
+.equ SP5 = 5\r
+.equ SP4 = 4\r
+.equ SP3 = 3\r
+.equ SP2 = 2\r
+.equ SP1 = 1\r
+.equ SP0 = 0\r
+\r
+; *** SPMCSR ***\r
+.equ SPMIE = 7 \r
+.equ RWWSB = 6\r
+.equ RWWSRE = 4\r
+.equ BLBSET = 3\r
+.equ PGWRT = 2\r
+.equ PGERS = 1\r
+.equ SPMEN = 0\r
+\r
+; *** MCUCR ***\r
+.equ JTD = 7 \r
+.equ PUD = 4\r
+.equ IVSEL = 1\r
+.equ IVCE = 0\r
+\r
+; *** MCUSR ***\r
+.equ JTRF = 4 \r
+.equ WDRF = 3\r
+.equ BORF = 2\r
+.equ EXTRF = 1\r
+.equ PORF = 0\r
+\r
+; *** SMCR ***\r
+.equ SM2 = 3 \r
+.equ SM1 = 2\r
+.equ SM0 = 1\r
+.equ SE = 0\r
+\r
+; *** OCDR ***\r
+.equ IDRD = 7 \r
+.equ OCD = 7\r
+.equ OCDR6 = 6\r
+.equ OCDR5 = 5\r
+.equ OCDR4 = 4\r
+.equ OCDR3 = 3\r
+.equ OCDR2 = 2\r
+.equ OCDR1 = 1\r
+.equ OCDR0 = 0\r
+\r
+; *** ACSR ***\r
+.equ ACD = 7 \r
+.equ ACBG = 6\r
+.equ ACO = 5\r
+.equ ACI = 4\r
+.equ ACIE = 3\r
+.equ ACIC = 2\r
+.equ ACIS1 = 1\r
+.equ ACIS0 = 0\r
+\r
+; *** SPSR ***\r
+.equ SPIF = 7 \r
+.equ WCOL = 6\r
+.equ SPI2X = 0\r
+\r
+; *** SPCR ***\r
+.equ SPIE = 7 \r
+.equ SPE = 6\r
+.equ DORD = 5\r
+.equ MSTR = 4\r
+.equ CPOL = 3\r
+.equ CPHA = 2\r
+.equ SPR1 = 1\r
+.equ SPR0 = 0\r
+\r
+; *** TCCR0A ***\r
+.equ FOC0A = 7 \r
+.equ WGM00 = 6\r
+.equ COM0A1 = 5\r
+.equ COM0A0 = 4\r
+.equ WGM01 = 3\r
+.equ CS02 = 2\r
+.equ CS01 = 1\r
+.equ CS00 = 0\r
+\r
+; *** GTCCR ***\r
+.equ TSM = 7 \r
+.equ PSR2 = 1\r
+.equ PSR10 = 0\r
+ \r
+; To make tim8pwm_def.inc file\r
+; part independent. \r
+.equ PSR0 = PSR10 \r
+.equ PSR1 = PSR10\r
+ \r
+; *** EECR ***\r
+.equ EERIE = 3 \r
+.equ EEMWE = 2\r
+.equ EEWE = 1\r
+.equ EERE = 0\r
+\r
+; *** EIMSK ***\r
+.equ PCIE1 = 7\r
+.equ PCIE0 = 6\r
+.equ INT0 = 0\r
+\r
+; *** EIFR ***\r
+.equ PCIF1 = 7\r
+.equ PCIF0 = 6\r
+.equ INTF0 = 0\r
+\r
+; *** TIFR2 ***\r
+.equ OCF2A = 1\r
+.equ TOV2 = 0\r
+\r
+; *** TIFR1 ***\r
+.equ ICF1 = 5 \r
+.equ OCF1B = 2\r
+.equ OCF1A = 1\r
+.equ TOV1 = 0\r
+\r
+; *** TIFR0 ***\r
+.equ OCF0A = 1\r
+.equ TOV0 = 0\r
+\r
+; *** PORTG ***\r
+.equ PORTG5 = 5\r
+.equ PORTG4 = 4\r
+.equ PORTG3 = 3\r
+.equ PORTG2 = 2\r
+.equ PORTG1 = 1\r
+.equ PORTG0 = 0\r
+\r
+; *** DDRG ***\r
+.equ DDG4 = 4\r
+.equ DDG3 = 3\r
+.equ DDG2 = 2\r
+.equ DDG1 = 1\r
+.equ DDG0 = 0\r
+\r
+; *** PING ***\r
+.equ PING5 = 5\r
+.equ PING4 = 4\r
+.equ PING3 = 3\r
+.equ PING2 = 2\r
+.equ PING1 = 1\r
+.equ PING0 = 0\r
+\r
+; *** PORTF ***\r
+.equ PORTF7 = 7 \r
+.equ PORTF6 = 6\r
+.equ PORTF5 = 5\r
+.equ PORTF4 = 4\r
+.equ PORTF3 = 3\r
+.equ PORTF2 = 2\r
+.equ PORTF1 = 1\r
+.equ PORTF0 = 0\r
+\r
+; *** DDRF ***\r
+.equ DDF7 = 7 \r
+.equ DDF6 = 6\r
+.equ DDF5 = 5\r
+.equ DDF4 = 4\r
+.equ DDF3 = 3\r
+.equ DDF2 = 2\r
+.equ DDF1 = 1\r
+.equ DDF0 = 0\r
+\r
+; *** PINF ***\r
+.equ PINF7 = 7 \r
+.equ PINF6 = 6\r
+.equ PINF5 = 5\r
+.equ PINF4 = 4\r
+.equ PINF3 = 3\r
+.equ PINF2 = 2\r
+.equ PINF1 = 1\r
+.equ PINF0 = 0\r
+\r
+; *** PORTE ***\r
+.equ PORTE7 = 7 \r
+.equ PORTE6 = 6\r
+.equ PORTE5 = 5\r
+.equ PORTE4 = 4\r
+.equ PORTE3 = 3\r
+.equ PORTE2 = 2\r
+.equ PORTE1 = 1\r
+.equ PORTE0 = 0\r
+\r
+; *** DDRE ***\r
+.equ DDE7 = 7 \r
+.equ DDE6 = 6\r
+.equ DDE5 = 5\r
+.equ DDE4 = 4\r
+.equ DDE3 = 3\r
+.equ DDE2 = 2\r
+.equ DDE1 = 1\r
+.equ DDE0 = 0\r
+\r
+; *** PINE ***\r
+.equ PINE7 = 7 \r
+.equ PINE6 = 6\r
+.equ PINE5 = 5\r
+.equ PINE4 = 4\r
+.equ PINE3 = 3\r
+.equ PINE2 = 2\r
+.equ PINE1 = 1\r
+.equ PINE0 = 0\r
+\r
+; *** PORTD ***\r
+.equ PORTD7 = 7 \r
+.equ PORTD6 = 6\r
+.equ PORTD5 = 5\r
+.equ PORTD4 = 4\r
+.equ PORTD3 = 3\r
+.equ PORTD2 = 2\r
+.equ PORTD1 = 1\r
+.equ PORTD0 = 0\r
+\r
+; *** DDRD ***\r
+.equ DDD7 = 7 \r
+.equ DDD6 = 6\r
+.equ DDD5 = 5\r
+.equ DDD4 = 4\r
+.equ DDD3 = 3\r
+.equ DDD2 = 2\r
+.equ DDD1 = 1\r
+.equ DDD0 = 0\r
+\r
+; *** PIND ***\r
+.equ PIND7 = 7 \r
+.equ PIND6 = 6\r
+.equ PIND5 = 5\r
+.equ PIND4 = 4\r
+.equ PIND3 = 3\r
+.equ PIND2 = 2\r
+.equ PIND1 = 1\r
+.equ PIND0 = 0\r
+\r
+; *** PORTC ***\r
+.equ PORTC7 = 7 \r
+.equ PORTC6 = 6\r
+.equ PORTC5 = 5\r
+.equ PORTC4 = 4\r
+.equ PORTC3 = 3\r
+.equ PORTC2 = 2\r
+.equ PORTC1 = 1\r
+.equ PORTC0 = 0\r
+\r
+; *** DDRC ***\r
+.equ DDC7 = 7 \r
+.equ DDC6 = 6\r
+.equ DDC5 = 5\r
+.equ DDC4 = 4\r
+.equ DDC3 = 3\r
+.equ DDC2 = 2\r
+.equ DDC1 = 1\r
+.equ DDC0 = 0\r
+\r
+; *** PINC ***\r
+.equ PINC7 = 7 \r
+.equ PINC6 = 6\r
+.equ PINC5 = 5\r
+.equ PINC4 = 4\r
+.equ PINC3 = 3\r
+.equ PINC2 = 2\r
+.equ PINC1 = 1\r
+.equ PINC0 = 0\r
+\r
+; *** PORTB ***\r
+.equ PORTB7 = 7 \r
+.equ PORTB6 = 6\r
+.equ PORTB5 = 5\r
+.equ PORTB4 = 4\r
+.equ PORTB3 = 3\r
+.equ PORTB2 = 2\r
+.equ PORTB1 = 1\r
+.equ PORTB0 = 0\r
+\r
+; *** DDRB ***\r
+.equ DDB7 = 7 \r
+.equ DDB6 = 6\r
+.equ DDB5 = 5\r
+.equ DDB4 = 4\r
+.equ DDB3 = 3\r
+.equ DDB2 = 2\r
+.equ DDB1 = 1\r
+.equ DDB0 = 0\r
+\r
+; *** PINB ***\r
+.equ PINB7 = 7 \r
+.equ PINB6 = 6\r
+.equ PINB5 = 5\r
+.equ PINB4 = 4\r
+.equ PINB3 = 3\r
+.equ PINB2 = 2\r
+.equ PINB1 = 1\r
+.equ PINB0 = 0\r
+\r
+; *** PORTA ***\r
+.equ PORTA7 = 7 \r
+.equ PORTA6 = 6\r
+.equ PORTA5 = 5\r
+.equ PORTA4 = 4\r
+.equ PORTA3 = 3\r
+.equ PORTA2 = 2\r
+.equ PORTA1 = 1\r
+.equ PORTA0 = 0\r
+\r
+; *** DDRA ***\r
+.equ DDA7 = 7 \r
+.equ DDA6 = 6\r
+.equ DDA5 = 5\r
+.equ DDA4 = 4\r
+.equ DDA3 = 3\r
+.equ DDA2 = 2\r
+.equ DDA1 = 1\r
+.equ DDA0 = 0\r
+\r
+; *** PINA ***\r
+.equ PINA7 = 7 \r
+.equ PINA6 = 6\r
+.equ PINA5 = 5\r
+.equ PINA4 = 4\r
+.equ PINA3 = 3\r
+.equ PINA2 = 2\r
+.equ PINA1 = 1\r
+.equ PINA0 = 0\r
+\r
+;*****************************************************************************\r
+; CPU Register Declarations\r
+;*****************************************************************************\r
+\r
+.def XL = r26 ; X pointer low\r
+.def XH = r27 ; X pointer high\r
+.def YL = r28 ; Y pointer low\r
+.def YH = r29 ; Y pointer high\r
+.def ZL = r30 ; Z pointer low\r
+.def ZH = r31 ; Z pointer high\r
+\r
+\r
+;*****************************************************************************\r
+; Data Memory Declarations\r
+;*****************************************************************************\r
+\r
+.equ RAMEND = $4ff ; Highest internal data memory (SRAM) address.\r
+ ;(1k RAM + IO + REG)\r
+.equ EEPROMEND = $01ff ; Highest EEPROM address.\r
+ ;(512 byte)\r
+;*****************************************************************************\r
+; Program Memory Declarations\r
+;*****************************************************************************\r
+\r
+.equ FLASHEND = $1FFF ; Highest program memory (flash) address\r
+ ; (When addressed as 16 bit words)\r
+ ; ( 8k words , 16k byte ) \r
+ \r
+;**** Boot Vectors ****\r
+ ; byte groups\r
+ ; /--\/--\/--\ \r
+.equ SMALLBOOTSTART =0b1111110000000 ;($1F80) smallest boot block is 256B\r
+.equ SECONDBOOTSTART =0b1111100000000 ;($1F00) second boot block size is 512B\r
+.equ THIRDBOOTSTART =0b1111000000000 ;($1E00) third boot block size is 1KB\r
+.equ LARGEBOOTSTART =0b1110000000000 ;($1C00) largest boot block is 2KB\r
+.equ BOOTSTART =THIRDBOOTSTART ;OBSOLETE!!! kept for compatibility\r
+\r
+;**** Page Size ****\r
+.equ PAGESIZE =64 ;number of WORDS in a page\r
+\r
+;**** Interrupt Vectors **** \r
+.equ INT0addr =$002 ;External Interrupt0 Interrupt Address\r
+.equ PCINT0addr =$004 ;Pin Change Interrupt0 Interrupt Address \r
+.equ PCINT1addr =$006 ;Pin Change Interrupt1 Interrupt Address\r
+.equ CMP2addr =$008 \r
+.equ OC2addr =$008 ;Timer/Counter2 Compare Match Interrupt Address\r
+.equ OVF2addr =$00a ;Overflow1 Interrupt Address\r
+.equ ICP1addr =$00c ;Input Capture1 Interrupt Address\r
+.equ OC1Aaddr =$00e ;Output Compare1A Interrupt Address\r
+.equ OC1Baddr =$010 ;Output Compare1B Interrupt Address \r
+.equ OVF1addr =$012 ;Overflow1 Interrupt Address\r
+.equ CMP0addr =$014 \r
+.equ OC0addr =$014 ;Timer/Counter0 Compare Match Interrupt Address\r
+.equ OVF0addr =$016 ;Overflow0 Interrupt Address\r
+.equ SPIaddr =$018 ;SPI Interrupt Address\r
+.equ URXC0addr =$01a ;UART Receive Complete Interrupt Address\r
+.equ UDRE0addr =$01c ;UART Data Register Empty Interrupt Address\r
+.equ UTXC0addr =$01e ;UART Transmit Complete Interrupt Address\r
+.equ USI_STARTaddr=$020 ;Universal Serial Bus Start Interrupt Address \r
+.equ USI_OVFaddr =$022 ;Universal Serial Bus Overflow Interrupt Address \r
+.equ ACIaddr =$024 ;Analog Comparator Interrupt Address\r
+.equ ADCCaddr =$026 ;ADC Conversion Complete Interrupt Address\r
+.equ ERDYaddr =$028 ;EEPROM write complete Interrupt Address\r
+.equ SPMRaddr =$02a ;Store Program Memory Ready Interrupt Address\r
+.equ LCDSFaddr =$02c ;LCD Start of Frame Interrupt Address\r
+\r
+;for compatibility with s8515\r
+.equ URXCaddr=$01a ;UART Receive Complete Interrupt \r
+.equ UDREaddr=$01e ;UART Data Register Empty Interrupt \r
+.equ UTXCaddr=$022 ;UART Transmit Complete Interrupt \r
+\r
projects / my-code / atmel.git / blobdiff