--- /dev/null
+;***************************************************************************\r
+;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y\r
+;* \r
+;* Number :AVR000\r
+;* File Name :"8534def.inc"\r
+;* Title :Register/Bit Definitions for the AT90C8534\r
+;* Date :99.01.28\r
+;* Version :1.30\r
+;* Support telephone :+47 72 88 43 88 (ATMEL Norway)\r
+;* Support fax :+47 72 88 43 99 (ATMEL Norway)\r
+;* Support E-mail :avr@atmel.com\r
+;* Target MCU :AT90C8534\r
+;*\r
+;* DESCRIPTION\r
+;* When including this file in the assembly program file, all I/O register \r
+;* names and I/O register bit names appearing in the data book can be used.\r
+;* In addition, the six registers forming the three data pointers X, Y and\r
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal \r
+;* SRAM is also defined \r
+;*\r
+;* The Register names are represented by their hexadecimal address.\r
+;* \r
+;* The Register Bit names are represented by their bit number (0-7).\r
+;* \r
+;* Please observe the difference in using the bit names with instructions\r
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" \r
+;* (skip if bit in register set/cleared). The following example illustrates\r
+;* this:\r
+;* \r
+;* in r16,PORTB ;read PORTB latch\r
+;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)\r
+;* out PORTB,r16 ;output to PORTB\r
+;*\r
+;* in r16,TIFR ;read the Timer Interrupt Flag Register\r
+;* sbrc r16,TOV0 ;test the overflow flag (use bit#)\r
+;* rjmp TOV0_is_set ;jump if set\r
+;* ... ;otherwise do something else\r
+;*\r
+;***** Specify Device\r
+.device AT90C8534\r
+\r
+;***** I/O Register Definitions\r
+.equ SREG =$3f\r
+.equ SPH =$3e\r
+.equ SPL =$3d\r
+.equ GIMSK =$3b\r
+.equ GIFR =$3a\r
+.equ TIMSK =$39\r
+.equ TIFR =$38\r
+.equ MCUCR =$35\r
+.equ TCCR0 =$33\r
+.equ TCNT0 =$32\r
+.equ TCCR1 =$2e\r
+.equ TCNT1H =$2d\r
+.equ TCNT1L =$2c\r
+.equ EEARH =$1f\r
+.equ EEARL =$1e\r
+.equ EEDR =$1d\r
+.equ EECR =$1c\r
+.equ PORTA =$1b\r
+.equ DDRA =$1a\r
+.equ GIPR =$10\r
+.equ ADMUX =$07\r
+.equ ADCSR =$06\r
+.equ ADCH =$05\r
+.equ ADCL =$04\r
+\r
+;***** Bit Definitions\r
+;GIMSK\r
+.equ INT1 =7\r
+.equ INT0 =6\r
+\r
+;GIFR\r
+.equ INTF1 =7\r
+.equ INTF0 =6\r
+\r
+;GIPR\r
+.equ IPIN1 =3\r
+.equ IPIN0 =2\r
+\r
+;TIMSK\r
+.equ TOIE1 =2\r
+.equ TOIE0 =0\r
+\r
+;TIFR\r
+.equ TOV1 =2\r
+.equ TOV0 =0\r
+\r
+;MCUCR\r
+.equ SE =6\r
+.equ SM =5\r
+.equ ISC1 =2\r
+.equ ISC0 =0\r
+\r
+;TCCR0\r
+.equ CS02 =2\r
+.equ CS01 =1\r
+.equ CS00 =0\r
+\r
+;TCCR1\r
+.equ CS12 =2\r
+.equ CS11 =1\r
+.equ CS10 =0\r
+\r
+;EECR\r
+.equ EERIE =3\r
+.equ EEMWE =2\r
+.equ EEWE =1\r
+.equ EERE =0\r
+\r
+;PORTA\r
+.equ PA6 =6\r
+.equ PA5 =5\r
+.equ PA4 =4\r
+.equ PA3 =3\r
+.equ PA2 =2\r
+.equ PA1 =1\r
+.equ PA0 =0\r
+\r
+;DDRA\r
+.equ DDA6 =6\r
+.equ DDA5 =5\r
+.equ DDA4 =4\r
+.equ DDA3 =3\r
+.equ DDA2 =2\r
+.equ DDA1 =1\r
+.equ DDA0 =0\r
+\r
+;ADMUX\r
+.equ MUX2 =2\r
+.equ MUX1 =1\r
+.equ MUX0 =0\r
+\r
+;ADCSR\r
+.equ ADEN =7\r
+.equ ADSC =6\r
+.equ ADFR =5\r
+.equ ADIF =4\r
+.equ ADIE =3\r
+.equ ADPS2 =2\r
+.equ ADPS1 =1\r
+.equ ADPS0 =0\r
+\r
+.def XL =r26\r
+.def XH =r27\r
+.def YL =r28\r
+.def YH =r29\r
+.def ZL =r30\r
+.def ZH =r31\r
+\r
+.equ RAMEND =$15f\r
+.equ XRAMEND =$15F\r
+.equ E2END =$1FF\r
+.equ FLASHEND=$FFF\r
+\r
+.equ INT0addr=$001 ;External Interrupt0 Vector Address\r
+.equ INT1addr=$002 ;External Interrupt1 Vector Address\r
+.equ OVF1addr=$003 ;Overflow1 Interrupt Vector Address\r
+.equ OVF0addr=$004 ;Overflow0 Interrupt Vector Address\r
+.equ ADCCaddr =$005 ;ADC Interrupt Vector Address\r
+.equ ERDYaddr =$006 ;EEPROM Interrupt Vector Address\r
projects / my-code / atmel.git / blobdiff