1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* Stupid RC623 implementations don't evaluate interrupts but poll the
168 * command register for "status idle" */
170 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
176 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
181 /* FIXME: read second time ?? */
187 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
189 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
194 /* Fixme: Abort after some timeout */
201 rc632_transmit(struct rfid_asic_handle *handle,
208 ret = rc632_fifo_write(handle, len, buf, 0x03);
212 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSMIT);
216 return rc632_wait_idle(handle, timeout);
220 tcl_toggle_pcb(struct rfid_asic_handle *handle)
222 // FIXME: toggle something between 0x0a and 0x0b
227 rc632_transcieve(struct rfid_asic_handle *handle,
228 const u_int8_t *tx_buf,
237 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
241 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSCIEVE);
246 tcl_toggle_pcb(handle);
248 ret = rc632_wait_idle(handle, timer);
252 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
259 DEBUGP("rx_len == 0\n");
261 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
262 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
267 return rc632_fifo_read(handle, *rx_len, rx_buf);
271 rc632_read_eeprom(struct rfid_asic_handle *handle)
273 u_int8_t recvbuf[60];
281 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
285 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
291 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
295 // FIXME: do something with eeprom contents
300 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
302 u_int8_t sndbuf[2] = { 0x01, 0x02 };
303 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
306 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
310 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
314 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
318 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
322 usleep(10000); // FIXME: no checking for cmd completion?
324 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
328 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
332 // FIXME: what to do with crc result?
338 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
343 for (i = 0; i <= 0x3f; i++) {
344 ret = rc632_reg_read(handle, i, &buf[i]);
345 // do we want error checks?
352 /* generic FIFO access functions (if no more efficient ones provided by
353 * transport driver) */
358 // FIXME: implementation (not needed for CM 5121)
365 // FIXME: implementation (not neded for CM 5121)
370 rc632_init(struct rfid_asic_handle *ah)
374 /* switch off rf (make sure PICCs are reset at init time) */
375 ret = rc632_power_down(ah);
382 ret = rc632_power_up(ah);
386 /* disable register paging */
387 ret = rc632_reg_write(ah, 0x00, 0x00);
391 /* set some sane default values */
392 ret = rc632_reg_write(ah, 0x11, 0x5b);
397 ret = rc632_turn_on_rf(ah);
405 rc632_fini(struct rfid_asic_handle *ah)
410 ret = rc632_turn_off_rf(ah);
414 ret = rc632_power_down(ah);
421 struct rfid_asic_handle *
422 rc632_open(struct rfid_asic_transport_handle *th)
424 struct rfid_asic_handle *h;
426 h = malloc(sizeof(*h));
429 memset(h, 0, sizeof(*h));
434 h->mtu = h->mru = 40; /* FIXME */
436 if (rc632_init(h) < 0) {
445 rc632_close(struct rfid_asic_handle *h)
453 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
455 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
460 rc632_iso14443a_init(struct rfid_asic_handle *handle)
464 // FIXME: some fifo work (drain fifo?)
466 /* flush fifo (our way) */
467 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
469 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
470 (RC632_TXCTRL_TX1_RF_EN |
471 RC632_TXCTRL_TX2_RF_EN |
472 RC632_TXCTRL_TX2_INV |
473 RC632_TXCTRL_FORCE_100_ASK |
474 RC632_TXCTRL_MOD_SRC_INT));
478 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
479 CM5121_CW_CONDUCTANCE);
483 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
484 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
485 CM5121_MOD_CONDUCTANCE);
489 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
490 (RC632_CDRCTRL_TXCD_14443A |
491 RC632_CDRCTRL_RATE_106K));
495 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
499 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
503 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
507 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
508 (RC632_RXCTRL1_GAIN_35DB |
509 RC632_RXCTRL1_ISO14443 |
510 RC632_RXCTRL1_SUBCP_8));
514 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
515 (RC632_DECCTRL_MANCHESTER |
516 RC632_DECCTRL_RXFR_14443A));
520 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
521 CM5121_14443A_BITPHASE);
525 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
526 CM5121_14443A_THRESHOLD);
530 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
534 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
535 (RC632_RXCTRL2_DECSRC_INT |
536 RC632_RXCTRL2_CLK_Q));
540 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
541 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
545 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
546 (RC632_CR_PARITY_ENABLE |
547 RC632_CR_PARITY_ODD));
551 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
555 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
563 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
567 ret = rc632_turn_off_rf(handle);
577 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
579 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
581 struct iso14443a_atqa *atqa)
587 memset(atqa, 0, sizeof(atqa));
591 /* transfer only 7 bits of last byte in frame */
592 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
596 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
597 RC632_CONTROL_CRYPTO1_ON);
602 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
603 (RC632_CR_PARITY_ENABLE |
604 RC632_CR_PARITY_ODD));
606 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
607 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
613 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
614 (u_int8_t *)atqa, &rx_len, 0x32, 0);
616 DEBUGP("error during rc632_transcieve()\n");
620 /* switch back to normal 8bit last byte */
621 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
626 DEBUGP("rx_len(%d) != 2\n", rx_len);
633 /* transcieve regular frame */
635 rc632_iso14443ab_transcieve(struct rfid_asic_handle *handle,
636 unsigned int frametype,
637 const u_int8_t *tx_buf, unsigned int tx_len,
638 u_int8_t *rx_buf, unsigned int *rx_len,
639 u_int64_t timeout, unsigned int flags)
642 u_int8_t rxl = *rx_len & 0xff;
643 u_int8_t channel_red;
645 memset(rx_buf, 0, *rx_len);
648 case RFID_14443A_FRAME_REGULAR:
649 case RFID_MIFARE_FRAME:
650 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
651 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
653 case RFID_14443B_FRAME_REGULAR:
654 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
658 case RFID_MIFARE_FRAME:
659 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
666 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
671 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
680 /* transcieve anti collission bitframe */
682 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
683 struct iso14443a_anticol_cmd *acf,
684 unsigned int *bit_of_col)
688 u_int8_t rx_len = sizeof(rx_buf);
689 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
692 *bit_of_col = ISO14443A_BITOFCOL_NONE;
693 memset(rx_buf, 0, sizeof(rx_buf));
695 /* disable mifare cryto */
696 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
697 RC632_CONTROL_CRYPTO1_ON);
701 /* disable CRC summing */
703 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
704 (RC632_CR_PARITY_ENABLE |
705 RC632_CR_PARITY_ODD));
707 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
708 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
713 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
714 tx_bytes = acf->nvb >> 4;
717 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
720 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
722 /* set RxAlign and TxLastBits*/
723 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
724 (rx_align << 4) | (tx_last_bits));
728 ret = rc632_transcieve(handle, (u_int8_t *)acf, tx_bytes,
729 rx_buf, &rx_len, 0x32, 0);
733 /* bitwise-OR the two halves of the split byte */
734 acf->uid_bits[tx_bytes-2] = (
735 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
738 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
740 /* determine whether there was a collission */
741 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
745 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
746 /* retrieve bit of collission */
747 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
751 /* bit of collission relative to start of part 1 of
752 * anticollision frame (!) */
753 *bit_of_col = 2*8 + boc;
760 RC632_RATE_106 = 0x00,
761 RC632_RATE_212 = 0x01,
762 RC632_RATE_424 = 0x02,
763 RC632_RATE_848 = 0x03,
767 u_int8_t subc_pulses;
769 u_int8_t rx_threshold;
770 u_int8_t bpsk_dem_ctrl;
778 static struct rx_config rx_configs[] = {
780 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
781 .rx_coding = RC632_DECCTRL_MANCHESTER,
782 .rx_threshold = 0x88,
783 .bpsk_dem_ctrl = 0x00,
786 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
787 .rx_coding = RC632_DECCTRL_BPSK,
788 .rx_threshold = 0x50,
789 .bpsk_dem_ctrl = 0x0c,
792 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
793 .rx_coding = RC632_DECCTRL_BPSK,
794 .rx_threshold = 0x50,
795 .bpsk_dem_ctrl = 0x0c,
798 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
799 .rx_coding = RC632_DECCTRL_BPSK,
800 .rx_threshold = 0x50,
801 .bpsk_dem_ctrl = 0x0c,
805 static struct tx_config tx_configs[] = {
807 .rate = RC632_CDRCTRL_RATE_106K,
811 .rate = RC632_CDRCTRL_RATE_212K,
815 .rate = RC632_CDRCTRL_RATE_424K,
819 .rate = RC632_CDRCTRL_RATE_848K,
824 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
834 if (rate > ARRAY_SIZE(rx_configs))
837 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
838 RC632_RXCTRL1_SUBCP_MASK,
839 rx_configs[rate].subc_pulses);
843 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
845 rx_configs[rate].rx_coding);
849 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
850 rx_configs[rate].rx_threshold);
854 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
855 rc = rc632_reg_write(handle,
856 RC632_REG_BPSK_DEM_CONTROL,
857 rx_configs[rate].bpsk_dem_ctrl);
863 if (rate > ARRAY_SIZE(tx_configs))
866 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
867 RC632_CDRCTRL_RATE_MASK,
868 tx_configs[rate].rate);
872 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
873 tx_configs[rate].mod_width);
881 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
885 // FIXME: some FIFO work
887 /* flush fifo (our way) */
888 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
892 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
893 (RC632_TXCTRL_TX1_RF_EN |
894 RC632_TXCTRL_TX2_RF_EN |
895 RC632_TXCTRL_TX2_INV |
896 RC632_TXCTRL_MOD_SRC_INT));
900 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
904 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
908 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
909 (RC632_CDRCTRL_TXCD_NRZ |
910 RC632_CDRCTRL_RATE_14443B));
914 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
918 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
922 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
923 (RC632_TBFRAMING_SOF_11L_3H |
924 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
925 RC632_TBFRAMING_EOF_11));
929 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
930 (RC632_RXCTRL1_GAIN_35DB |
931 RC632_RXCTRL1_ISO14443 |
932 RC632_RXCTRL1_SUBCP_8));
936 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
937 (RC632_DECCTRL_BPSK |
938 RC632_DECCTRL_RXFR_14443B));
942 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
943 CM5121_14443B_BITPHASE);
947 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
948 CM5121_14443B_THRESHOLD);
952 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
953 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
954 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
955 RC632_BPSKD_FILTER_AMP_DETECT |
956 RC632_BPSKD_NO_RX_EOF |
957 RC632_BPSKD_NO_RX_EGT));
961 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
962 (RC632_RXCTRL2_AUTO_PD |
963 RC632_RXCTRL2_DECSRC_INT));
967 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
971 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
972 (RC632_CR_TX_CRC_ENABLE |
973 RC632_CR_RX_CRC_ENABLE |
978 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
982 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
990 rc632_iso15693_init(struct rfid_asic_handle *h)
994 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
995 (RC632_TXCTRL_MOD_SRC_INT |
996 RC632_TXCTRL_TX2_INV |
997 RC632_TXCTRL_TX2_RF_EN |
998 RC632_TXCTRL_TX1_RF_EN));
1002 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1006 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1010 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1011 (RC632_CDRCTRL_RATE_15693 |
1016 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1020 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1024 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1028 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1029 (RC632_RXCTRL1_SUBCP_16 |
1030 RC632_RXCTRL1_ISO15693 |
1031 RC632_RXCTRL1_GAIN_35DB));
1035 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1036 (RC632_DECCTRL_RXFR_15693 |
1037 RC632_DECCTRL_RX_INVERT));
1041 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1045 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1049 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1053 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1054 (RC632_RXCTRL2_AUTO_PD |
1055 RC632_RXCTRL2_DECSRC_INT));
1059 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1061 RC632_CR_RX_CRC_ENABLE |
1062 RC632_CR_TX_CRC_ENABLE));
1066 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1070 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1078 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1082 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1083 (RC632_TXCTRL_MOD_SRC_INT |
1084 RC632_TXCTRL_TX2_INV |
1085 RC632_TXCTRL_TX2_RF_EN |
1086 RC632_TXCTRL_TX1_RF_EN));
1090 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1094 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1098 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1102 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1106 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1110 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1114 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1118 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1122 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1126 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1130 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1134 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1138 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1139 RC632_RXCTRL2_DECSRC_INT);
1143 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1144 (RC632_CR_RX_CRC_ENABLE |
1145 RC632_CR_TX_CRC_ENABLE));
1146 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1150 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1158 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1164 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1165 (RC632_TXCTRL_MOD_SRC_INT |
1166 RC632_TXCTRL_TX2_INV |
1167 RC632_TXCTRL_TX2_RF_EN |
1168 RC632_TXCTRL_TX1_RF_EN));
1172 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1176 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1180 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1181 (RC632_CDRCTRL_RATE_15693 |
1182 RC632_CDRCTRL_TXCD_ICODE_STD |
1187 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1191 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1194 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1195 (RC632_RXCTRL1_SUBCP_16|
1196 RC632_RXCTRL1_ISO15693|
1197 RC632_RXCTRL1_GAIN_35DB));
1200 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1201 (RC632_DECCTRL_RX_INVERT|
1202 RC632_DECCTRL_RXFR_15693));
1206 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1210 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1214 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1218 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1219 RC632_RXCTRL2_DECSRC_INT);
1223 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1227 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1231 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1238 struct mifare_authcmd {
1240 u_int8_t block_address;
1241 u_int32_t serno; /* lsb 1 2 msb */
1242 } __attribute__ ((packed));
1245 #define RFID_MIFARE_KEY_LEN 6
1246 #define RFID_MIFARE_KEY_CODED_LEN 12
1248 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1250 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1256 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1257 ln = key6[i] & 0x0f;
1259 key12[i * 2 + 1] = (~ln << 4) | ln;
1260 key12[i * 2] = (~hn << 4) | hn;
1266 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1268 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1272 ret = rc632_mifare_transform_key(key, coded_key);
1276 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1280 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1284 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1288 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1292 if (reg & RC632_ERR_FLAG_KEY_ERR)
1299 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1303 struct mifare_authcmd acmd;
1306 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1309 /* Initialize acmd */
1310 acmd.block_address = block & 0xff;
1311 acmd.auth_cmd = cmd;
1312 //acmd.serno = htonl(serno);
1315 ret = rc632_clear_bits(h, RC632_REG_CONTROL,
1316 RC632_CONTROL_CRYPTO1_ON);
1319 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1320 RC632_CR_RX_CRC_ENABLE);
1324 /* Send Authent1 Command */
1325 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1329 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1333 /* Wait until transmitter is idle */
1334 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1338 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1345 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1346 RC632_CR_TX_CRC_ENABLE);
1350 /* Send Authent2 Command */
1351 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1355 /* Wait until transmitter is idle */
1356 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1360 /* Check whether authentication was successful */
1361 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1365 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1372 /* transcieve regular frame */
1374 rc632_mifare_transcieve(struct rfid_asic_handle *handle,
1375 const u_int8_t *tx_buf, unsigned int tx_len,
1376 u_int8_t *rx_buf, unsigned int *rx_len,
1377 u_int64_t timeout, unsigned int flags)
1380 u_int8_t rxl = *rx_len & 0xff;
1382 DEBUGP("entered\n");
1383 memset(rx_buf, 0, *rx_len);
1386 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1387 (RC632_CR_PARITY_ENABLE |
1388 RC632_CR_PARITY_ODD |
1389 RC632_CR_TX_CRC_ENABLE |
1390 RC632_CR_RX_CRC_ENABLE));
1392 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1393 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1398 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1407 struct rfid_asic rc632 = {
1408 .name = "Philips CL RC632",
1409 .fc = ISO14443_FREQ_CARRIER,
1412 .power_up = &rc632_power_up,
1413 .power_down = &rc632_power_down,
1414 .turn_on_rf = &rc632_turn_on_rf,
1415 .turn_off_rf = &rc632_turn_off_rf,
1416 .transcieve = &rc632_iso14443ab_transcieve,
1418 .init = &rc632_iso14443a_init,
1419 .transcieve_sf = &rc632_iso14443a_transcieve_sf,
1420 .transcieve_acf = &rc632_iso14443a_transcieve_acf,
1421 .set_speed = &rc632_iso14443a_set_speed,
1424 .init = &rc632_iso14443b_init,
1427 .init = &rc632_iso15693_init,
1430 .setkey = &rc632_mifare_set_key,
1431 .auth = &rc632_mifare_auth,