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hackbard [Sat, 21 Apr 2007 13:11:03 +0000 (13:11 +0000)]
fooblah
hackbard [Tue, 10 Apr 2007 09:37:13 +0000 (09:37 +0000)]
usb init fixed
hackbard [Mon, 9 Apr 2007 14:42:05 +0000 (14:42 +0000)]
jtag via bitbanging of port d
hackbard [Sat, 7 Apr 2007 15:38:47 +0000 (15:38 +0000)]
small ep mods for fx2, added xilprg patch to support bitbanging the fx2
hackbard [Mon, 26 Feb 2007 17:09:30 +0000 (17:09 +0000)]
added syncdelays + cpu init
hackbard [Mon, 26 Feb 2007 14:17:00 +0000 (14:17 +0000)]
cafete backups
hackbard [Mon, 26 Feb 2007 13:30:52 +0000 (13:30 +0000)]
added fx2 rule to Makefile
hackbard [Sat, 24 Feb 2007 19:08:57 +0000 (19:08 +0000)]
more init stuff
hackbard [Sat, 24 Feb 2007 03:41:42 +0000 (03:41 +0000)]
iod and oed are special function registers, no xdata!
hackbard [Tue, 13 Feb 2007 16:26:13 +0000 (16:26 +0000)]
now empty line seems to be allowd ...
hackbard [Tue, 13 Feb 2007 01:22:29 +0000 (01:22 +0000)]
added a makefile and a VERY VERY minimalistic not working fx2 fw
hackbard [Tue, 13 Feb 2007 00:56:48 +0000 (00:56 +0000)]
forgot to free tbuf and rbuf since they were static during first tries
hackbard [Tue, 13 Feb 2007 00:40:18 +0000 (00:40 +0000)]
initial checkin of usb_bulk_test code
hackbard [Mon, 12 Feb 2007 09:43:01 +0000 (09:43 +0000)]
initial checkin of ee2ihex code
hackbard [Sat, 27 Jan 2007 07:43:59 +0000 (07:43 +0000)]
well, should imho work, i bet it wont though!
hackbard [Fri, 26 Jan 2007 15:37:40 +0000 (15:37 +0000)]
begin jtag tool (for xilinx low cost parallel jtag cable only)
projects / my-code / fpga.git / log