From 93885b52eac89908bd09246c2b2aae0a09b7cff2 Mon Sep 17 00:00:00 2001 From: hackbard Date: Sun, 20 Feb 2011 14:50:27 +0100 Subject: [PATCH] arrrrgh! --- monolyzer/main.asm | 118 +++++++++++++++++++++++++++++--------------- monolyzer/port.asm | 17 +++++-- monolyzer/timer.asm | 46 ++++++++++++++++- monolyzer/uart.asm | 3 +- 4 files changed, 137 insertions(+), 47 deletions(-) diff --git a/monolyzer/main.asm b/monolyzer/main.asm index 8795636..c2482c7 100644 --- a/monolyzer/main.asm +++ b/monolyzer/main.asm @@ -15,6 +15,11 @@ .def count = r19 .def state = r20 .def scount = r21 +.def input = r22 +.def save = r23 + +;.define FLOODME +;.define S_FLOODME ; ; interrupts @@ -88,7 +93,7 @@ INIT: rcall PORT_INIT ; timer1 init - rcall TIMER1_INIT + rcall TIMER1_INIT_64 ; uart init rcall UART_INIT @@ -129,17 +134,33 @@ INIT_STORAGE: ldi uart_rxtx,0x72 rcall UART_TX +.ifdef FLOODME DEBUG_PORT: ;rcall UART_RX - ;ldi uart_rxtx,0x30 - ;in tmp1,PIND - ;sbrc tmp1,2 - ;ldi uart_rxtx,0x31 - ;rcall UART_TX - ;rjmp DEBUG_PORT - - ; external interrupt enable - rcall INT0_IR_CONF_INIT + ldi scount,0 +DEBUG_PORT_LOOP: + lsl uart_rxtx + in tmp1,PIND + sbrc tmp1,2 + add uart_rxtx,one + add scount,one + cpi scount,8 + brne DEBUG_PORT_LOOP + rcall UART_TX + rjmp DEBUG_PORT +.endif + +.ifdef S_FLOODME +DEBUG_PORT: + ldi uart_rxtx,0x30 + in tmp1,PIND + sbrc tmp1,2 + add uart_rxtx,one + rcall UART_TX + rjmp DEBUG_PORT +.endif + ; enable interrupts + rcall INT0_IR_CONF_R rcall INT0_IR_ENABLE ; global interrupt enable @@ -150,13 +171,9 @@ MAIN: SAMPLE: ; sample as long as there is storage capacity and signal - cpi state,2 + cpi state,10 brne SAMPLE - ; disable interrupts - rcall INT0_IR_DISABLE - rcall TIMER1_INT_DISABLE - ; signal finish ldi uart_rxtx,0x66 rcall UART_TX @@ -167,13 +184,25 @@ IDLE: rcall UART_RX ; decode instruction - cpi uart_rxtx,0x52 + cpi uart_rxtx,0x72 breq RESET - cpi uart_rxtx,0x54 + cpi uart_rxtx,0x74 breq TRANSFER + cpi uart_rxtx,0x73 + breq SINGLE_SAMPLE rjmp IDLE +SINGLE_SAMPLE: + + ; sample port d pin 2 and output via uart + ldi uart_rxtx,0x30 + in tmp2,PIND + sbrc tmp2,2 + ldi uart_rxtx,0x31 + rcall UART_TX + rjmp IDLE + TRANSFER: ; reset storage pointer @@ -213,28 +242,29 @@ TRANSFER_LOOP: INT0_IR: - ; debug output - ; cbi PORTD,3 + in save,SREG + + cli ; get timer value in tmp1,TCNT1L in tmp2,TCNT1H - ; check for initial or running state - cpi state,0 - brne INT0_RUN - - ; configure interrupt for running state - rcall INT0_IR_CONF_RUN - ldi state,1 - - ; reset timer and start ovf interrupt + ; reset timer ldi tmp1,0 out TCNT1H,tmp1 out TCNT1L,tmp1 + + ; check for running state + cpi state,5 + breq INT0_RUN + + ; reconfigure int0 + rcall INT0_IR_CONF_FR + ldi state,5 rcall TIMER1_INT_ENABLE - rjmp EXIT_IR + rjmp LEAVE_INT0_IR INT0_RUN: @@ -245,40 +275,46 @@ INT0_RUN: ; inc counter add count,one - ; reset timer - ldi tmp1,0 - out TCNT1H,tmp1 - out TCNT1L,tmp1 - ; check for left capacity cpi count,55 - brne EXIT_IR + brne LEAVE_INT0_IR ; indicate end of 'c'apacity ldi uart_rxtx,0x63 rcall UART_TX ; exit sampling - ldi state,2 + ldi state,10 -EXIT_IR: + ; leave all interrupts cleared + rjmp EXIT_INT0_IR - ; debug output - ; sbi PORTD,3 +LEAVE_INT0_IR: + + sei + +EXIT_INT0_IR: + + out SREG,save reti T1_OVF_IR: + in save,SREG + + cli + ; indicate 'o'verflow end ldi uart_rxtx,0x6f rcall UART_TX ; exit sampling - ldi state,2 + ldi state,10 - reti + out SREG,save + reti ; ; sram diff --git a/monolyzer/port.asm b/monolyzer/port.asm index 42c08fa..85c57e1 100644 --- a/monolyzer/port.asm +++ b/monolyzer/port.asm @@ -6,7 +6,7 @@ PORT_INIT: cbi DDRD,2 ; switch pull-up off (useless, default) - cbi DDRD,2 + cbi PORTD,2 ; port d pin 6 -> output sbi DDRD,6 @@ -19,8 +19,7 @@ PORT_INIT: ret - -INT0_IR_CONF_INIT: +INT0_IR_CONF_R: ; trigger interrupt on rising edge in tmp1,MCUCR @@ -30,7 +29,17 @@ INT0_IR_CONF_INIT: ret -INT0_IR_CONF_RUN: +INT0_IR_CONF_F: + + ; trigger interrupt on rising edge + in tmp1,MCUCR + sbr tmp1,(1<